Please complete the following pre-laboratory exercises.
1. (3pts) For the circuit shown in Fig. 2, derive the transfer function for Vo/Vin in terms of R, C and find the
expressions for the magnitude and phase responses. Express your results in the form
Vo
Vin
Vin(t)
jw
Wp
jw
Wp
Where wpid the pole frequency location in rad/sec
1+
C
He
R
Vo(t)
Fig. 2. First order high pass filter (integrator)
2. (3pts) For C= 10nF, find R so that pole frequency location is 4.8 kHz. Draw the bode (magnitude and
phase) plots using MATLAB, Python or Excel.
3. (4pts) Simulate the high pass filter circuit using the PSpice simulator (Capture CIS 17.4 ). Compare
the simulation results with your hand-calculation. Attach the magnitude and phase simulation results and
compare them with part 2 results (bode plots).
Fig: 1
8.68 The cascode amplifier of Fig. 8.31 is operated at acurrent of 0.2 mA with all devices operating at Vov =0.25 V. All devices have V A = 4 V. Find gm, the output resistance of the amplifier, R, the output resistance of recurrent source, the overall output resistance, R, and the voltage gain, A,.
a) For the CG amplifier in Fig. 8.18(a), show that thecurrent gain i,/i is given by \frac{i_{o}}{i_{\text {sig }}}=\frac{R_{\text {s }}}{R_{\text {s }}+R_{\text {in }}} O For the case g, =2 mA/V, r, = 20 k2, and R, = 20 kN,find the current gain obtained with R,%3D20 kN.%3D (c) If R, is doubled (that is, increased by 100%), find the corresponding percentage change in current gain. If R, is increased from 20 kohms to 200 kohms (that is,increased by 900%), what is the corresponding change in current gain? e) Using the results of (c) and (d), comment on the performance of the CG circuit as a current buffer.
8.30 An NMOS transistor fabricated in a certain process is found to have an intrinsic gain of 40 V/V when operated a tan I, of 100 µA. Find the intrinsic gain for 1p, = 25 µA and Ip, = 400 µ A. For each of these currents, find the factor by which g changes from its value at Ip = 100 µA.
8.73 The purpose of this problem is to investigate the signal currents and voltages at various points throughout a cascode amplifier circuit. Knowledge of this signal distribution is very useful in designing the circuit so as to allow for the required signal swings. Figure P8.73 shows a CMOS cascode amplifier with all de voltages replaced with signal grounds. As well, we have explicitly shown the resistance r, of each-of the four transistors. For simplicity, we are assuming that-the four transistors have the same g and r,. The amplifier is fed with a signal v,. -) Determine R,, R,, and R,. Assume gr, »I. Determine i,, i, i,, i̟, iş, i̟, and i,, all in terms of v,. If v, is a 5-mV peak sine wave and gmr0, = 20, sketch and clearly label the waveform of v1 v2, and v3.
8.83 To further increase the output resistance of a cascode current source or current mirror, another level of cascoding can be employed as shown is Fig. P8.83. Find the output resistance of this double-cascode current mirror.
8.24 Figure P8.24 shows an amplifier utilizing a currentmirror Q,-Q,. Here Q, is a common-source amplifier fedwith v, = Ves + v,, where Vs is the gate-to-source de biasGS voltage of Q, and v, is a small signal to be amplified. Find the signal component of the output voltage v, and hence the small-signal voltage gain v/v,. Also, find the small-signal resistance of the diode-connected transistor Q, in terms of gm2, and hence the total resistance between the drain of Q,and ground. What is the voltage gain of the CS amplifier Q,?Neglect all ros.
Arrange the voltage and current waveforms of the same PspiceB simulation next to each other or one after the other. Label your waveforms. i.Perform the theoretical analysis for the circuit shown in Figure 1 to find: The voltage waveform across the capacitor and the resistor R3 • The current waveform through the capacitor and the resistor R3. Calculate the energy stored in the capacitor at t= 2.4 seconds and at t-3 seconds.
c) [5 pts] (Metacognition) Reflect on the simulation results, compare and contrast with the analytical results and explain. b) [10 pts] (LTSpice) Design an LTSpice simulation for the circuit in Problem #2. Include a screenshot of the simulation circuit and all settings and a screenshot of the output.LTSpice Guidelines, Requirements, and Examples a) [5 pts] For the circuit used in Problem #2. Prior to simulation, choose values for I0, i , L,and R and based on these values calculate t and 5t so that you have an understanding of what to expect from the simulation. Simulate the circuit shown above in LTSpice.
8.63 The cascode amplifier in Fig. 8.28(a) is fabricated using two identical transistors having V, =3 V and operated at Voy = 0.15 V. What is the realized open-circuit voltage gain?
8.34 For an NMOS transistor with L = 0.5 µm fabricated in the 0.13-um process specified in Table K.1 in Appendix K, find g r, and A, if the device is operated with Vov =0.15 V and 1,= 50 µA. Also, find the required device width W.